首页   :    半导体技术大会 :    CSTIC精彩回顾 :    CSTIC 2015

Keynote & Invited Speakers(2015)

Plenary Session

王曦 教授中国科学院院士,中国科学院上海微系统与信息技术研究所

Dr. Seok-Hee Lee, Executive VP and DRAM product development and technology, SK Hynix

Rudi Cartuyvels, Senior Vice President, Smart Systems & Energy Technologies, IMEC, Belgium

Confirmed Invited Speakers

** Keynote Speech    * Invited Speech

Symposium I: Device Engineering and Technology

 **Malgorzata Jurczak, IMEC

RRAM status and perspective for different applications

*Jong-Hyun Ahn, Professor, Yonsei University  

Graphene film for flexible, stretchable electronics

*An Chen, Senior Member of Technical Staff (SMTS), Globalfoundries 

Selector devices for high-density emerging memory design

*Kang-Guo Cheng, Senior Engineer, IBM

FinFET Technology – Facts and Fiction

*Simon Deleonibus, Director, CEA-LETI  

TOWARDS ZERO INTRINSIC VARIABILITY AND ZERO POWER FUTURE FULL 3D MICRO/NANO-ELECTRONICS

*Jan Hoentschel, Device Manager, Globalfoundries  

From the Present to the Future: Scaling of Planar VLSI-CMOS Devices Towards 3D-FinFETs and Beyond 10nm CMOS Technologies; Manufacturing Challenges and Future Technology Concepts

*Byoung Hun Lee, Professor, Gwangju Institute of Science and Technology 

Novel Extreme Low Power Devices and Architectures for Power Scaling Era

*Jong-Ho Lee, Professor, Seoul National University  

NAND flash memory cells with steep subthreshold swing

*Qiliang Li, Professor, George Mason University  

Molecular Flash Memory Based on Redox-active Molecules

*Juin J.Liou, Pegasus Distinguished Professor, University of Central Florida 

New and Effective Methodologies for System-Level Electrostatic Discharge (ESD) Characterization

*Eddy Simoen, Professor, IMEC  

Noise Analysis in Advanced Memory Devices

*Jianhua Joshua Yang, Professor, University of Massachusetts, Amherst Professor 

Memristive Devices for Computing

*Jian Fu Zhang, Professor, Liverpool John Moores University 

NBTI defects and lifetime prediction: similarity and differences between Si and Ge MOSFETs

Symposium II: Lithography and Patterning

**Bill Arnold, Director, ASML  

Making the Smallest Devices Economically using EUV Lithography

**Esahi, Professor, Tohoku University  

Advances in MEMS and Sensor Technology

**Masato Shibuya, Professor, Tokyo Poritic University  

Optical Lithography Enabling Evolution of Optical Imaging Theory

**Chris Progler, CTO, Photronics  

Photomask Technology At 14nm and Beyond

**Xuelong Shi, Director, SMIC  

Early Development of 14nm Patterning

**Andrzej J. Strojwas, Chief Technologist, PDF Solutions 

Design Technology Co-Development Methodology for 10nm and 7nm Technology Nodes

*David Z. Pan, Professor, University of Texas at Austin

Design for Manufacturability and Reliability in Extreme Scaling and Beyond  

*Tim Fühner, Scientist, Fraunhofer Institute, IISB  

Modeling and simulation of the DSA-assisted lithography process 

*Geert Vandenberghe, Manager, IMEC  

Implementation of templated Directed Self-Assembly (DSA) for via layer patterning at the 7nm node 

*Yansong Liu, Sr. Engineer, Institute of Microelectronics 

Enlarge the process window of 22nm SRAM M1 by using OPC and SMO

*Yasin Ekinci, Senior Scientist, Paul Scherrer Institute, Switzerland 

Towards the ultimate resolution in photolithography

*Hidetami Yaegashi, Chief Engineer, Tokyo Electron LTD 

Enabling Capability of Multi-Patterning towards 10nm and beyond

*Guanyang Lin, Senior R&D Manager, AZ Electronic Materials USA Corp. 

Novel materials and processes for advanced DSA performances

*Leo Pang, VP, D2S system  

Removing the Last Road Block of Deploying ILT into Production

*Zirong Tang, Professor, Huazhong University of Science and Technology

Fabrication of 3D Carbon Structures based on C-MEMS technique

*Takashi Kato, Senior Engineer, Hitachi High Technologies Corp. 

High effective metrology by using electron beam for 22 nm-node HVM and beyond

*Chongfei Shen, CEO, Magnity Electronics   

Recent advances in thermal imaging technology

Symposium III: Dry & Wet Etch and Cleaning

*Xing Chen, Chief Scientist, MKS Instruments, USA  

Remote Plasma Sources in Advanced Paaterning

*He Gao, RSM, HGST  

Fabrication of Large Arrays of Sub-10 nm Features Using Multiple Patterning Techniques for Bit Patterned Media

*Thomas Tillocher, Professor, GREMI, CNRS/Uniersity Orleans, France

Plasma Cryoenic Etching: from 3D Integration to Low-k Materials

*Banqiu Wu, Principal MTS and CTO of Mask and TSV Etch Division, Applied Materials, USA  

EUV Lithography and 3D IC Technology

*Honda Masonobu, R&D Manager of Tokyo Electron Miyagi, Tokyo Electron Miyagi Limited, Japan  

Challenges and Renovations on Dielectric Etch and Patterning

*Olivier Pollet, Etch / Stripping Process Engineering Team Leader, Univ.Grenoble Alpes 

Etching and stripping process developments for sub-10nm FDSOI device architectures using alternative lithography techniques  

Symposium IV: Thin Film Technology

*Jennifer Jing, Manager, Semiconductor Manufacturing International corporation  

28nm BEOL Cu gap fill challenges for metal film deposition

*Per-Erik Hellström, Research leader, KTH Royal Institute of Technology 

Thulium silicate as interfacial layer in scaled high-k/metal gate stacks.

*Haiying Fu, Director, Lam Research  

Advanced Patterning Films / Spacers deposited by CVD and ALD Methods

*Julian Hsieh, Sr. Director, ASM International   

ALD Technology Trend & Industrial Adoption

*Silvia Armini, Sr. Scientist, imec  

Metallization approaches and challenges for interconnect downscaling both from R and C perspective

*Jinping Liu, Deputy Director, GLOBALFOUNDRIES   

Impact of Si precursors on micro-loading, morphology and throughput for selective Si/SiGe epi growth

*Jian Zhou, Sr. Technologist, Lam Research  

Low Cu Electrolyte for Advanced Damascene Plating

*Jerry Chen, Tech Product Mgr, ASM America   

ALD-based material solutions for advanced FinFET devices

*David Thompson, Director, Applied Materials  

ALD Precursor Screening and Industry Adoption

*Chih-Chao Yang, Sr. Scientist and Master Inventor, IBM Research 

Enhanced Electromigration Resistance through Grain Size Modulation in Copper Interconnects 

Symposium V: CMP, Wafer Substrate Polishing and Post-Polish Cleaning

**Yongsik Moon, RD Manager, GF  

Technical Challenges in Chemical Mechanical Polishing (CMP) for Sub-10nm Logic Technology 

*Viorel Balan, CMP process engineer, ST Micro  

CMP: Enabling the Third Dimension

*HJ Yang, Director of RD, Entegris  

Novel approch to CMP slurry filtration through new generation nano-fiber technology

*Yehwan Kim, Senior Engineer, Samsung  

Sub-10nm Ceria Slurry for Scratch-Free in CMP Process

*Jun Yang, CMP RD Manager, SMIC  

Advanced Process Control Applications for Advanced CMP Process

*KeeJoon Oh, Principal Engineer, Hynix  

Development and Performance Effects of Calcination Free Ceria Slurry

*Yoshitaka Tsunashima, VP of RD, Nitta-Hass  

Pad and Slurry Solution of Sapphire Polishing for LED Substrate and Smartphone Cover Glass Applications

*Alex Wang, Product manager, Cabot Microelectronics  

A New Way to Think About Colloidal Silica Bulk Oxide Slurry

*Chao-Chang Arthur Chen, Professor, National Taiwan University of Science and Technology  

CMP Pad Analysis and Modeling

*Xinchun Lu, Professor, ChinHua University  

Simulation of material removal of CMP

*Kuang-Wei Chen, Project Manager, Macronix  

Slurry Selectivity to Local Thickness Variations Control in advanced Cu CMP Process 

Symposium VI: Materials and Process Integration for Device and Interconnection

*Gong Zhang, SMTS, SMIC 

Techniques to Improve Read Noise Margin and Write Margin for Bit-cell of 14nm FINFET node

*Jiang Yan, Professor, Institute of Microelectronics Chinese Academy of Sciences 

RFSOI

*Reza Arghavani, Lam Research  

A New Inflection Point in Logic Technology Local Interconnect, A Transition from NiSi and Ti/TiN/W Contact/Metal Zero to New Materials

*Hui-Jung Wu, Director of Engineering, Lam Research  

Enabling Advanced Interconnect Scaling and Reliability Improvement

*Peter Cheng, CTO, Semitronix 

Advanced test chip solutions for fast and accurate BEOL RC characterizations

*Jeff Xu, Qualcomm  

Materials and Advanced Process Innovations Enabling N7 Scaling

*Dick James, Senoir Fellow/Tchnology Analyst, Chip Works  

Advance technology node reverse engin

Symposium VII: Packaging and Assembly

*John Rowland, VP Engineering, Spreadtrum

Package Development Trends for Cost/Performance Tradeoffs in Mobile Platform ASICs 

*Yifan Guo, VP, ASE Shanghai  

IOT and Associated Packaging Solutions

*Dongkai Shangguan, CEO, NCAP 

Evolution of 3D Packaging: Challenges & Opportunities

*He Huang, Director, SMIC 

Prospectus of Emerging 3D Wafer  Level System Integration and Packaging

*John Yuanlin Xie, Director, Altera Corp. 

Developing the Cost Effective High Bandwidth System Solutions Using Heterogeneous 2.5D integrations of Stacked Die Memory and FPGA

*Asen Long, Director, JCAP 

Modularized Technology Service Platform in WLP Packaging

*Daquan Yu, VP Technology, Tianshui Huatian 

The Industrialization of MEMS Packaging Technology based on Laminate and Leadframe Substrate

*Mingliang Huang, Professor, Dalian University of Technology 

Applications of synchrotron radiation real-time imaging technology in characterizing the reliability of micro bumps in electronic packaging

*Mark Huang, CTO, Speed  

TSV Fabrication for Image Sensor Packaging

*YB Lin, Director, JCET 

Advanced MIS Technology Development 

Symposium VIII: Metrology, Reliability and Testing

**Abhijit Chatterjee, Professor, Georgia Tech, USA

*Jörgen Olsson, Professor, Uppsala University, Sweden 

Stress and reliability of integrated RF-LDMOS transistors

*Gunnar Malm, Professor, KTH, Sweden 

Microwave and noise characterization for wideband spintronic oscillators

*Barry Linder, RSM, IBM, USA 

FinFet Reliability:  Challenges and Opportunities

*Jinghong Li, Senior Engineer, IBM, USA

Failure Analysis of Semiconductor Devices by Transmission Electron Microscopy

Symposium IX: Emerging Semiconductor Technologies

*Chung Lam, Distinguished Engineer and manager, IBM T. J. Watson Research Center

Phase Change Memory and its intended Applications

*Rich Shen, President, eMemory

Logic NVM for IoT applications

*Kuei-Shu Chang-Liao,  Professor, National Tsing Hua University

Ultralow Low EOT and High Oxidation State Interfacial Layer in Ge MOS Devices

*Gwan Hyoung Lee, Professor, Yonsei University

Two-Dimensional Materials and Their Heterostructures for Flexible and Transparent Electronics

*Wooyoung Shim, Professor, Yonsei University

Resistive-switch nanowire transistor for logic circuits

*Kuan-Neng Chen, Professor, National Chiao Tung University

Research Achievements and Application Demonstrations of 3D IC and Heterogeneous Integration

*Tuo-Hung Hou, Professor, Natinal Chiao Tung University

3D RRAM Technology for Electronic Synapses Applications

*Zhen Zhang, Professor, Uppsala University

Ion sensing using An Ion-gated Bipolar Amplifier

*Luping Shi, Professor, Director of CBICR, Tsinghua University 

Interface plays a vital role in Ge MOSFET: a first principle point of view

*An Chen, Senior Member of Technical Staff, Globalfoundries  

Selector devices for high-density emerging memory design

*Zhitang Song, Professor, Director of State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology 

Phase Change Material and Its Electronic Device

Symposium X: Advances in MEMS and Sensor Technologies

*Tarik Bourouina, Prof., ESIEE, Paris, France

Monolithic silicon-micromachined free-space optical interferometers onchip

*Frank Roscher, Prof., Fraunhofer Institute for Electronic Nano Systems ENAS, Germany

Additive Manufacturing for zero and first level packaging of Electronics and MEMS using Aerosol-Jet Deposition of Metal Nanoparticles

*Shuji Tanaka, Prof.,  Tohoku University Sendai, Japan

Academic Approach to New Industry-Relevant MEMS

*G.P. Li, Director and Prof., Calit2,University of California-Irvine, USA  

Heterogeneous Integrated System Technology (HIST) for Internet of Things

*Mai Phuong Nguyen, Professor, WPI-AIMR at Tohoku University Sendai, Japan 

Nanostructures for MEMS Device

*Hans Zappe, Professor, University of Freiburg

Stretchable micro-optics

*Qinghuang Lin, Manager, IBM T.J. Watson Research Center, USA  

200 mm Wafer-Scale Integration of Sub-20 nm Nanofluidic Chips for Detecting and Controlling Single DNA Molecules

*Zhen Zhang, Professor, Uppsala University, Sweden  

Ion sensing using An Ion-gated Bipolar Amplifier

*Chung Lam, DE and Manager, IBM T.J. Watson Research Center, USA

Phase Change Memory and its intended Applications

*Miao Lu, Professor, Xiamen University, China 

Fabrication of tilted polymeric pillar array for coupling multimode optic fiber to silicon oxynitride waveguide

*Yang Heng, Professor, Institute of micro system and information technology, CAS, China 

Study on Silicon Oscillators for Timing Applications

*Jinling Yang, Professor, Institute of Semiconductors, CAS, China 

Cantilever-based sensors for biomedical applications

*May Wang, Senior Director, Technology Development, QST, China 

Solving the Challenges in Manufacturing High Performance Sensors using Monolithic Approach

Symposium XI: Circuit Design, System Integration and Applications

*Andrzej Strojwas, Chief Technologist, PDF Solutions  

Design Technology Co-Development Methodology for 10nm and 7nm Technology Nodes

*David Z. Pan, Professor, The University of Texas at Austin  

Design for Manufacturability and Reliability in Extreme Scaling and Beyond

*Pingqiang Zhou, 周平强, Assistant professor, Shanghai Tech University 

Techniques to reduction energy consumption in heterogeneous multicore processors

*Hai Wang, Professor, University of Electronic Science and Technology of China 

Efficient dynamic thermal management method based on model predictive control with DVFS and task migration

*Li Jiang, Professor, CS Department, Shanghai Jiao Tong University 

Fault tolerance for emerging technologies, emphasized in 3D ICs and CNFETs

*Weikang Qian, Professor, Shanghai Jiao Tong Univ.  

BDD-Based Synthesis of Reconfigurable Single-Electron Transistor Arrays

*Guojie Luo, Assistant Professor, Peking University  

An Analytical Method for Physical Synthesis of Multi-bit Flip-flops

*Deming Chen, Associate Professor, University of Illinois at Urbana-Champaign, USA 

Boosting Design Productivity for the Internet of Billons of Things

*Yong Liu, Research Staff Member, IBM T.J. Watson Research Center 

High-Speed Low-Power Inter- and Intra-Chip I/O Technologies

*Xiaoxiong Gu (Kevin), Research Staff Member, IBM T.J. Watson Research Center 

IC-Package Co-Design with Integrated Antennas for Millimeter Wave Phased-Array Applications

*Chongfei Shen, CEO, Magnity Electronics 

Recent advances in thermal imaging technology

*Ming Liu, CEO , Capital Microelectronics 

China Programmable IC: Innovation with CAP Technology

*Lei He, Professor, UCLA  

Internet of things for smart home and smart garden

*Yu-Guang Chen, Lecturer, Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan.    

Q-Learning Based Dynamic Voltage Scaling for Designs with Graceful Degradation

Symposium XII: Si Materials and Photovoltaic

*Baoshen Zhong, President, Longi Silicon 

从每瓦投资到度电成本的转变

*Ray Lian, Senior Analyst, Sunbuzz 

全球光伏市场趋势

*Yunlin Sun,孙韵琳, Manager, Shunde solar energy research institute of zhongshan university 

monocrystalline wafer/module trends

*Liang Wu, Professor, GCL/Shanghai University 

CCZ process

*Jyh-Chen Chen, Professor, NCU 

Oxygen Impurity Control in CZ Silicon Crystal Growth

*Deren Yang, Professor, Zhejiang University

Chemically-Doped-Free Graphene-Silicon Solar Cells

*Yunjun Li, President, Starsource Scientific LLC 

Aluminum Paste for IBC Silicon Solar Cells

*Frank Liu, Professor, Shaanxi Normal Unvi. 

Effective light trapping using hybrid nanostructure

*Xixiang Xu, chief technology officer, Hanenergy 

Current Status and Future Prospect for Thin Film Silicon Based Photovoltaic Technology Development in Hanergy

*Xiaodan Zhang, Professor, Institute of Photo Electronics thin Film Devices and Technology of Nankai University  

Modify the Optical-Electrical Properties of Silicon Heterojunction Solar Cells

*Zhengxin Liu, Shanghai Institute of Microsystem and Information Technology (SIMIT), Chinese Academy of Sciences (CAS) 

R&D Progress of HIT Solar Cell in SIMIT-Trina Joint-lab

*Ted Guo, Manager, ENN  

Development of TCO Film and Deposition Technology for High Efficiency Silicon Heterojunction Solar Cells

*Wenzhong Shen, Professor, Shanghai Jiaotong University 

High efficiency silicon nanostructured solar cells on large scale realized through suppression of recombination channels

 

 

*Baomin Xu, Professor, SUST China 

 

Printing Technologies for Silicon Solar Cell Fabrication

*Bonna Newman, Scientist, ECN 

Increasing c-Si Solar Cell and Module Efficiency with Competitive Manufacturing

*Markus Eberstein, Groupmanager Fraunhofer

Glass Phase Alignment in Front Side Pastes for P- and N-Type Solar Cells 

*Tingkai Li, CTO, Gongchuang  

thin film Si manufacturing

*Yuepeng Wan, CTO, LDK Solar LTD. CO. 

Will Multi-crystalline Silicon Wafer Still Dominate the Market?

*Tiezheng Lv, Professor, Hunan University 

铸锭炉低成本高效热场的改造及与大热场的兼容性



 

 

沪ICP备06022522号沪公网安备31011502010679号